Device for compensating process and operating parameter variations in CMOS integrated circuits
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United States of America Patent
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Apr 17, 2001
Grant Date -
N/A
app pub date -
Dec 1, 1999
filing date -
Dec 3, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A device (DC) is provided for compensating process and operating parameters variations in a CMOS integrated circuit. The device comprises means (CP, CT) for generating a first and a second compensation signals which depend on quality indexes of the fabrication process of the P and N transistors of the integrated circuit and on the operating temperature, and which are capable of compensating deviations of the controlled quantity from the desired value, due to the deviation of the quality indexes and temperature, respectively, from a typical value which would originate the desired value for the output parameter. The compensating device also can be implemented in the form of CMOS integrated circuit, preferably jointly with the device (OS) to be subjected to compensation (FIG. 1).
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