Method and apparatus for generating a symmetrical output signal from a non-symmetrical input
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United States of America Patent
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Apr 24, 2001
Grant Date -
N/A
app pub date -
Aug 30, 1999
filing date -
Aug 30, 1999
priority date (Note) -
Expired
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Abstract
A method of generating a symmetrical output signal with a 50% duty cycle. The symmetrical output signal is generated without the need for the input signal to be at twice the frequency of the output signal. By utilizing the differential output of a circuit and cross-coupling this to the inputs of comparators a series of outputs are obtained. These outputs are then used to control a latch device by utilizing only a single edge. Because only a single edge is used to control the low to high and high to low transition, the delay is a fixed constant and the resulting output is a symmetrical output signal with a 50% duty cycle.
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