Assembly process for flip chip package having a low stress chip and resulting structure
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United States of America Patent
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May 1, 2001
Grant Date -
N/A
app pub date -
Aug 25, 1998
filing date -
Aug 25, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for assembling a flip-chip package having a low stress chip comprises providing a laminate chip carrier having a chip electrically connected thereon, applying the underfill material between the chip and the laminate chip carrier, providing a cover plate and applying an adhesive to the cover plate or chip or both, placing the cover plate adjacent to the chip such that the adhesive contacts the chip and the cover plate, and curing the underfill material together with the adhesive. The resultant flip-chip package has low internal stress and experiences enhanced fatigue life during thermal cycling.
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