Importance

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Abstract

A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a further detail, a capacitor circuit is disclosed for the discretely variable capacitance that includes a transistor that selectively couples a capacitor between a signal node and ground and a means for coupling a voltage node between the capacitor and the transistor to the signal node when the transistor is in an 'off' state. The means for coupling may be a second transistor.

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First Claim