Method and apparatus for generating error detection data for encapsulated frames
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United States of America Patent
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-
May 1, 2001
Grant Date -
N/A
app pub date -
Dec 14, 1998
filing date -
Dec 14, 1998
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An error detection generator calculates error detection data for insertion into encapsulated frames. The error detection generator is configured to calculate multiple error detection values and insert them into corresponding fields of the encapsulated frames. The error detection generator includes a controller, three cyclic redundancy check (CRC) engines and at least one multiplexer. Each CRC engine is selectively enabled by the controller to calculate a frame check sequence (FCS) value on a different portion of the frame. Downstream CRC engines also receive the outputs from the upstream CRC engines so that these earlier FCS values may be used during subsequent calculations. The outputs of the CRC engines are also inserted into the appropriate fields of the encapsulated frames by the multiplexer.
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