Method of forming a polysilicon diode and devices incorporating such diode
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United States of America Patent
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May 8, 2001
Grant Date -
N/A
app pub date -
Aug 11, 1999
filing date -
Jun 18, 1996
priority date (Note) -
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Abstract
A method for manufacturing a diode having a relatively improved on-off ratio. The diode is formed in a container in an insulative structure layered on a substrate of an integrated circuit. The container is then partially filled with a polysilicon material, by methods such as conformal deposition, leaving a generally vertical seam in the middle of the polysilicon material. An insulative material is deposited in the seam. The polysilicon material is appropriately doped and electrical contacts and conductors are added as required. The diode can be coupled to a chalcogenide resistive element to create a chalcogenide memory cell.
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