Interconnect device and method for mating dissimilar electronic package footprints
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United States of America Patent
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-
May 8, 2001
Grant Date -
N/A
app pub date -
Nov 6, 1998
filing date -
Nov 6, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An interconnect device for connecting an electronic package, whether it be a single chip or a multi-component device, to a primary substrate requiring the mating of dissimilar solder patterns includes a secondary substrate having a first face and a second face. The first face of the secondary substrate may include a first pattern of conductive lands formed on the first face corresponding to a plurality of conductive leads of an electronic package. The second face of the secondary substrate includes a second pattern of conductive lands corresponding to a plurality of conductive lands formed on the primary substrate. The first pattern of conductive lands formed on the first face is electrically connected to the second pattern of conductive lands formed on the second face via surface and internal conductive paths. Solder ball reflow soldering methods are used to connect the electronic device to the secondary substrate and to connect the secondary substrate to the primary substrate.
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