Using FET switches for large memory arrays
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United States of America Patent
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May 15, 2001
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N/A
app pub date -
Apr 1, 1998
filing date -
Apr 1, 1998
priority date (Note) -
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Abstract
The present invention discloses a method and apparatus for interfacing a memory array to a memory controller using a field-effect transistor (FET) switch. The memory controller has a bus which comprises a plurality of signal lines. The memory array is coupled to the memory controller. The memory array is divided into N groups of memory devices; each group has K memory devices. K memory devices in each of the N groups share memory signal lines. The FET switch couples the bus to one of the N groups of the shared memory signal lines at different times in response to a switch control indication.
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