US Patent No: 6,239,367

Number of patents in Portfolio can not be more than 2000

Multi-chip chip scale package

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Abstract

A multi-chip chip scale package. The package has a film carrier whereby two chips with different sizes can be disposed on the same film carrier. A flip chip technique is used to arrange each chip on each side of the film carrier face to face. A bump is formed on each chip to electrically connect with the film carrier. An insulation material is filled in between the chips to leave one side of each chip exposed. The conductive wires of the film carrier are connected to the chips directly.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
UNITED MICROELECTRONICS CORP.HSINCHU4012

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hsuan, Min-Chih Hsinchu, TW 38 604
Lin, Cheng-Te Taipei Hsien, TW 11 354

Cited Art

Patent Info (Count) # Cites Year
 
FREESCALE SEMICONDUCTOR, INC. (1)
5,285,352 Pad array semiconductor device with thermal conductor and process for making the same 299 1992
 
GOLDSTAR ELECTRON CO., LTD. (1)
5,331,235 Multi-chip semiconductor package 81 1992
 
HITACHI TOHBU SEMICONDUCTOR, LTD. (1)
5,910,685 Semiconductor memory module having double-sided stacked memory chip layout 61 1997
 
LSI LOGIC CORPORATION (1)
5,681,777 Process for manufacturing a multi-layer tab tape semiconductor device 20 1996
 
SONY CORPORATION (1)
5,945,741 Semiconductor chip housing having a reinforcing plate 37 1997

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
AMKOR TECHNOLOGY, INC. (102)
7,485,952 Drop resistant bumpers for fully molded memory cards 0 2003
7,071,541 Plastic integrated circuit package and method and leadframe for making the package 1 2003
7,245,007 Exposed lead interposer leadframe package 44 2003
7,057,280 Leadframe having lead locks to secure leads to encapsulant 4 2003
6,921,967 Reinforced die pad support structure 4 2003
6,998,702 Front edge chamfer feature for fully-molded memory cards 7 2003
6,846,704 Semiconductor package and method for manufacturing the same 10 2003
6,967,395 Mounting for a package containing a chip 12 2003
6,893,900 Method of making an integrated circuit package 1 2003
7,138,707 Semiconductor package including leads and conductive posts for providing increased functionality 5 2003
7,144,517 Manufacturing method for leadframe and for semiconductor package using the leadframe 3 2003
7,211,879 Semiconductor package with chamfered corners and method of manufacturing the same 4 2003
6,965,157 Semiconductor package with exposed die pad and body-locking leadframe 9 2003
7,115,445 Semiconductor package having reduced thickness 1 2004
7,057,268 Cavity case with clip/plug for use on multi-media card 3 2004
7,091,594 Leadframe type semiconductor package having reduced inductance and its manufacturing method 7 2004
7,170,150 Lead frame for semiconductor package 2 2004
6,844,615 Leadframe package for semiconductor devices 7 2004
7,005,326 Method of making an integrated circuit package 5 2004
7,190,062 Embedded leadframe semiconductor package 24 2004
7,211,471 Exposed lead QFP package fabricated through the use of a partial saw process 43 2004
7,598,598 Offset etched corner leads for semiconductor package 0 2004
7,202,554 Semiconductor package and its manufacturing method 14 2004
7,045,882 Semiconductor package including flip chip 7 2004
6,953,988 Semiconductor package 18 2004
7,217,991 Fan-in leadframe semiconductor package 8 2004
7,253,503 Integrated circuit device packages and substrates for making the packages 41 2004
7,001,799 Method of making a leadframe for semiconductor devices 2 2004
7,064,009 Thermally enhanced chip scale lead on chip semiconductor package and method of making same 7 2004
7,030,474 Plastic integrated circuit package and method and leadframe for making the package 2 2004
7,214,326 Increased capacity leadframe and semiconductor package using the same 4 2005
7,247,523 Two-sided wafer escape package 15 2005
6,995,459 Semiconductor package with increased number of input and output pins 49 2005
7,192,807 Wafer level package and fabrication method 17 2005
7,045,883 Thermally enhanced chip scale lead on chip semiconductor package and method of making same 5 2005
7,507,603 Etch singulated semiconductor package 8 2005
7,361,533 Stacked embedded leadframe 20 2005
7,572,681 Embedded electronic component package 19 2005
7,112,474 Method of making an integrated circuit package 1 2005
7,564,122 Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant 1 2006
8,410,585 Leadframe and semiconductor package made using the leadframe 0 2006
7,535,085 Semiconductor package having improved adhesiveness and ground bonding 2 2006
7,902,660 Substrate for semiconductor device and manufacturing method thereof 15 2006
7,968,998 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package 2 2006
7,321,162 Semiconductor package having reduced thickness 0 2006
7,332,375 Method of making an integrated circuit package 0 2006
7,521,294 Lead frame for semiconductor package 5 2006
7,714,431 Electronic component package comprising fan-out and fan-in traces 20 2006
7,687,893 Semiconductor package having leadframe with exposed anchor pads 3 2006
7,829,990 Stackable semiconductor package including laminate interposer 1 2007
7,982,297 Stackable semiconductor package having partially exposed semiconductor die and method of fabricating the same 1 2007
7,420,272 Two-sided wafer escape package 16 2007
7,723,210 Direct-write wafer level chip scale package 6 2007
7,977,774 Fusion quad flat semiconductor package 3 2007
7,687,899 Dual laminate package structure with embedded elements 5 2007
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7,847,386 Reduced size stacked semiconductor package and method of making the same 0 2007
7,560,804 Integrated circuit package and method of making the same 1 2008
7,956,453 Semiconductor package with patterning layer and method of making same 1 2008
7,723,852 Stacked semiconductor package and method of making same 4 2008
8,067,821 Flat semiconductor package with half package molding 2 2008
7,768,135 Semiconductor package with fast power-up cycle and method of making same 3 2008
7,808,084 Semiconductor package with half-etched locking features 1 2008
8,125,064 Increased I/O semiconductor package and method of making same 0 2008
8,184,453 Increased capacity semiconductor package 1 2008
7,692,286 Two-sided fan-out wafer escape package 20 2008
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7,989,933 Increased I/O leadframe and semiconductor device including same 1 2008
8,008,758 Semiconductor device with increased I/O leadframe 3 2008
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7,982,298 Package in package semiconductor device 1 2008
8,058,715 Package in package device for RF transceiver module 1 2009
7,732,899 Etch singulated semiconductor package 0 2009
8,026,589 Reduced profile stackable semiconductor package 5 2009
7,960,818 Conformal shield on punch QFN semiconductor package 0 2009
7,928,542 Lead frame for semiconductor package 1 2009
7,977,163 Embedded electronic component package fabrication method 2 2009
8,089,141 Semiconductor package having leadframe with exposed anchor pads 0 2010
7,872,343 Dual laminate package structure with embedded elements 1 2010
8,188,584 Direct-write wafer level chip scale package 0 2010
7,932,595 Electronic component package comprising fan-out traces 4 2010
8,324,511 Through via nub reveal method and structure 0 2010
7,906,855 Stacked semiconductor package and method of making same 1 2010
8,294,276 Semiconductor device and fabricating method thereof 0 2010
8,084,868 Semiconductor package with fast power-up cycle and method of making same 0 2010
8,319,338 Thin stacked interposer package 0 2010
8,440,554 Through via connected backside embedded circuit features structure and method 0 2010
8,299,602 Semiconductor device including leadframe with increased I/O 0 2010
8,283,767 Dual laminate package structure with embedded elements 0 2010
8,188,579 Semiconductor device including leadframe having power bars and increased I/O 1 2010
8,390,130 Through via recessed reveal structure and method 0 2011
8,318,287 Integrated circuit package and method of making the same 0 2011
8,102,037 Leadframe for semiconductor package 0 2011
8,119,455 Wafer level package fabrication method 1 2011
8,441,110 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package 0 2011
8,304,866 Fusion quad flat semiconductor package 0 2011
8,432,023 Increased I/O leadframe and semiconductor device including same 0 2011
8,227,921 Semiconductor package with increased I/O density and method of making same 0 2011
8,298,866 Wafer level package and fabrication method 0 2012
 
MICRON TECHNOLOGY, INC. (15)
6,710,454 Adhesive layer for an electronic apparatus having multiple semiconductor devices 21 2000
6,987,031 Multiple chip semiconductor package and method of fabricating same 6 2002
6,964,881 Multi-chip wafer level system packages and methods of forming same 18 2002
7,135,780 Semiconductor substrate for build-up packages 6 2003
6,958,537 Multiple chip semiconductor package 5 2004
7,087,992 Multichip wafer level packages and computing systems incorporating same 7 2004
7,109,063 Semiconductor substrate for build-up packages 5 2004
7,485,562 Method of making multichip wafer level packages and computing systems incorporating same 6 2005
7,173,330 Multiple chip semiconductor package 1 2005
7,943,422 Wafer level pre-packaged flip chip 0 2006
7,812,447 Wafer level pre-packaged flip chip 2 2006
7,808,112 Wafer level pre-packaged flip chip system 2 2006
7,646,102 Wafer level pre-packaged flip chip systems 4 2006
7,635,611 Semiconductor substrate for build-up packages 3 2006
7,553,697 Multiple chip semiconductor package 0 2006
 
STATS CHIPPAC LTD. (7)
8,432,026 Stackable multi-chip package system 0 2006
7,645,638 Stackable multi-chip package system with support structure 2 2006
7,622,333 Integrated circuit package system for package stacking and manufacturing method thereof 3 2006
7,759,783 Integrated circuit package system employing thin profile techniques 0 2006
7,683,467 Integrated circuit package system employing structural support 4 2006
8,067,272 Integrated circuit package system for package stacking and manufacturing method thereof 0 2009
7,915,738 Stackable multi-chip package system with support structure 0 2009
 
MEGICA CORPORATION (6)
7,205,646 Electronic device and chip package 6 2003
8,124,446 Structure of high performance combo chip and processing method 0 2007
7,960,212 Structure of high performance combo chip and processing method 0 2007
8,148,806 Multiple chips bonded to packaging structure with low noise and multiple selectable functions 2 2008
7,960,842 Structure of high performance combo chip and processing method 0 2008
7,919,873 Structure of high performance combo chip and processing method 0 2008
 
ROHM CO., LTD. (4)
6,870,248 Semiconductor chip with external connecting terminal 7 2000
7,339,264 Semiconductor chip with external connecting terminal 1 2005
7,262,490 Semiconductor chip with external connecting terminal 0 2005
7,138,298 Semiconductor chip with external connecting terminal 0 2005
 
ADVANCED SEMICONDUCTOR ENGINEERING, INC. (1)
6,320,757 Electronic package 16 2000
 
DONGBUANAM SEMICONDUCTOR INC. (1)
6,627,979 Semiconductor package and fabrication method of the same 10 2002
 
FAIRCHILD SEMICONDUCTOR CORPORATION (1)
7,582,956 Flip chip in leaded molded package and method of manufacture thereof 1 2007
 
FUJI XEROX CO., LTD. (1)
7,260,284 Semiconductor integrated circuit and semiconductor integrated circuit arrangement device and process 0 2005
 
RICHTEK TECHNOLOGY CORP. (1)
8,097,952 Electronic package structure having conductive strip and method 0 2010
 
ROUND ROCK RESEARCH, LLC (1)
7,019,410 Die attach material for TBGA or flexible circuitry 1 1999
 
SAMSUNG ELECTRONICS CO., LTD. (1)
6,825,553 Multichip wafer level packages and computing systems incorporating same 10 2003
 
UTADA TECHNOLOGIES, LLC (1)
7,053,414 Optical semiconductor component to prevent electric leakage and provide different driving voltages 5 2004