Importance

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Abstract

A digital image signal is latched by four latches respectively in response to four latch clock signs, which have a frequency that is 1/4 of a frequency of a dot clock signal and phases that are mutually shifted by every period of the dot dock signal. The four latched digital image signals are further latched by a common latch in response to a common latch signal. The digital image signals with respect to four consecutive pixels are then output as one set of digital image signals. The output digital image signals are written into consecutive storage areas in a frame memory, in response to a write sampling dock signal which has a frequency that is 1/4 of the frequency of the dot clock signal The number of latches is regulated according to a frequency of an analog image signal. This arrangement facilitates image processing for high-frequency image signals.

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First Claim