Approach to provide high external voltage for flash memory erase
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United States of America Patent
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May 29, 2001
Grant Date -
N/A
app pub date -
Oct 23, 2000
filing date -
Aug 19, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
In this invention external high voltages are connected to a chip containing a flash memory that are connected to selected cells to be erased. Internal pump circuits contained on the chip are turned off while the external voltages are used. The external voltages, a high negative voltage and a high positive voltage, are connected to gates and sources respectively of selected cells to be erased by a voltage control module. The external voltages are used during manufacture during program/erase operations to perform the erase function efficiently. The internal high voltage pump circuits are used to erase flash memory cells after being assembled on a circuit board by a user. Two level shifter circuits are disclosed that form a part of the voltage control module. The level shifter circuits apply voltages to the flash memory cells and provide voltages that select and deselect the cells for erasure.
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