Bus bridge that provides selection of optimum timing speed for transactions
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United States of America Patent
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May 29, 2001
Grant Date -
N/A
app pub date -
May 7, 1998
filing date -
May 7, 1998
priority date (Note) -
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status (Latency Note)
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Abstract
An improved bus bridge in a computer system for connecting a first data bus and a second data bus, said bus bridge having means for connecting said first and second buses, means for receiving an address representing a transaction on said first bus, means for decoding said address, means for claiming the transaction on said first bus corresponding to said address, and means for passing said transaction to said second bus, wherein the improvement comprises: (a) means for determining if said address decodes into one of a plurality of address ranges programmed in said bridge device; (b) means for determining a timing speed for the transaction corresponding to said address in accordance with the address range for said address; and (d) means for asserting a signal for claiming the transaction at said determined timing speed.
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