Nonvolatile semiconductor memory device

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United States of America Patent

PATENT NO 6243290
SERIAL NO

09645878

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Abstract

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The present invention provides a nonvolatile semiconductor memory device for multilevel data storage that simultaneously carries out programming of multilevel data and subsequent verification at a high programming throughput. For this purpose, the present device includes a circuit 6 to hold programming data when programming is executed, a circuit 7 to generate timing signals to set up level-specific phases of verifying multilevel programming data during a verification period, a circuit 2 to increase stepwise the selected word line voltage during verification in accordance with the above timing signals, a circuit 4 to select target memory cells 1 for verification, depending on the data retrieved from the latch in accordance with the above timing signals, and verify whether the selected memory cells have been programmed on threshold voltage level, according to the energized or de-energized state thereof, and a circuit 5 to supply programming bias to the bit line to program data into insufficiently programmed memory cells, according to the verify results.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kimura, Katsutaka Akishima, JP 109 2167
Kobayashi, Naoki Tokyo, JP 431 5120
Kobayashi, Takashi Tokorozawa, JP 692 7856
Kume, Hitoshi Musashino, JP 102 2440
Kurata, Hideaki Kokubunji, JP 64 891
Saeki, Shunichi Ome, JP 21 291

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