Computer system with power loss protection mechanism
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United States of America Patent
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-
Jun 5, 2001
Grant Date -
N/A
app pub date -
Oct 31, 1998
filing date -
Oct 31, 1998
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A computer system protects against loss of a computer's volatile data using system ROM and operating system resources. Upon entry into a reduced power state, or sleep mode, the operating system directs device drivers to save the state of hardware registers to RAM. Then, the system ROM saves the contents of RAM to a file in a non-volatile storage medium, such as a hard disk drive. A bit is set in CMOS to indicate completion of this transfer. Upon return from sleep mode, the system ROM clears the CMOS bit and returns to normal operation. However, if a system reboot occurs and the CMOS bit is set, the non-volatile storage file is retrieved, and its contents are restored to RAM. The operating system then directs device drivers to retrieve information from the restored RAM to reinitialize the hardware registers under their control. Thus, the integrity of volatile RAM is maintained following a power loss during a reduced power state.
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