Method and apparatus for netlist filtering and cell placement
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United States of America Patent
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Jun 5, 2001
Grant Date -
N/A
app pub date -
Mar 13, 1998
filing date -
Mar 13, 1998
priority date (Note) -
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Abstract
Integrated circuit chip (IC) design and fabrication is a complex process requiring many stages including elaborate cell placement processes. The present invention provides a method and apparatus to facilitate the placement of cells on the surface of an integrated circuit device. Specifically, the invention involves placement of one type of cells (such as logic cells, I/O cells or scan cells) apart from other types of cells. The present invention facilitates the placement of such cells by first parsing the netlist to remove all cells other than the specific type of cells that are to be placed.
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