Integrated circuit test pad
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United States of America Patent
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Jun 12, 2001
Grant Date -
N/A
app pub date -
Nov 17, 1998
filing date -
Nov 28, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
The present invention relates to an integrated circuit test pad implemented in a surface metallization layer covered with an insulating coating. The pad is surrounded with a first metal ring made in the surface metallization layer and with a second metal ring made in a lower metallization surface, the first and second rings being electrically interconnected by at least one via and set to a fixed potential.
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