Method for making a chip tamper-resistant
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United States of America Patent
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Jun 12, 2001
Grant Date -
N/A
app pub date -
Jul 10, 1998
filing date -
Jul 10, 1998
priority date (Note) -
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Abstract
A method of detecting tampering with an integrated circuit using circuit paths extending in the integrated circuit and carrying signals which are compared to each other, and to thresholds, and providing an output signal in the event that predetermined signal conditions occur. The predetermined signal conditions which occur may be a change of state of an output of a gate which interconnects the two circuit paths, or a change of state of the output of testing circuitry which tests signals in at least one of the circuit paths against a threshold. In a further aspect the invention concerns an integrated circuit chip provided with tamper detecting circuitry.
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