Incremental method for critical area and critical region computation of via blocks
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United States of America Patent
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Jun 19, 2001
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N/A
app pub date -
May 26, 1998
filing date -
May 26, 1998
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Abstract
An efficient computer implemented method computes critical area for via blocks in Very Large Scale Integrated (VLSI) circuits. The method is incremental and takes advantage of the hierarchy in the design. In order to increase the efficiency further we use the L.sub..infin. or the L.sub.1 metric instead of the Euclidean geometry.
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