IC chip package with directly connected leads
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 19, 2001
Grant Date -
N/A
app pub date -
Jun 2, 1998
filing date -
Jun 2, 1998
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An improved semiconductor device is disclosed. In one embodiment, the semiconductor device includes a semiconductor chip with contact areas on the top or bottom surface. A first lead assembly, formed from a semi-rigid sheet of conductive material, has a lead assembly contact attached to one of the contact areas of the semiconductor chip. The first lead assembly also has at least one lead connected to and extending from the lead assembly contact. A second lead assembly, also formed from a semi-rigid sheet of conductive material, has a lead assembly contact attached to another one of the contact areas of the semiconductor chip. The second lead assembly also has at least one lead connected to and extending from the lead assembly contact. An encapsulant encloses the semiconductor chip, the lead assembly contact of the first lead assembly and the lead assembly contact of the second lead assembly. The semiconductor device has low electrical and thermal resistance contributions from the package due to the direct connection of the lead assemblies to the chip. The semiconductor device may be formed as either a leaded package or a leadless chip carrier package.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully