Programmable logic array integrated circuit with distributed random access memory array
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United States of America Patent
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Jun 19, 2001
Grant Date -
N/A
app pub date -
Jan 15, 1998
filing date -
May 23, 1997
priority date (Note) -
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Abstract
A programmable logic array integrated circuit is provided which comprises: a plurality of logic array blocks in which respective logic array blocks include, multiple respective programmable logic elements and respective random access memory arrays and corresponding memory access control circuitry and respective shared programmable local interfaces; and a network of conductors which is programmable to connect a respective local interface circuit of substantially any logic array block to a respective local interface of substantially any other logic array block.
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