Delay circuit arrangement for use in a DAC/driver waveform generator with phase lock rise time control
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United States of America Patent
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-
Jun 19, 2001
Grant Date -
N/A
app pub date -
Sep 25, 1998
filing date -
Sep 25, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A delay circuit arrangement includes a delay cell and controller. The delay cell includes a differential pair of N-Channel devices and P-Channel devices coupling the differential pair to positive voltage rail. The controller provides conductivity adjustment in the P-Channel devices. Adjustment of the delay is made by adjusting the current in a device biased in its linear region and coupling the differential devices to a ground potential.
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