Nonvolatile memory device and inspection method therefor
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United States of America Patent
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Jun 19, 2001
Grant Date -
N/A
app pub date -
Sep 23, 1999
filing date -
Sep 28, 1998
priority date (Note) -
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Abstract
A nonvolatile memory device for which an endurance test can be performed in a short time without requiring an apparatus for exclusive use for generating a reference current. The nonvolatile memory includes a memory cell for holding binary data and outputting, upon reading therefrom, first current or second current which is lower than the first current in response to the binary data, a reference circuit for generating reference current lower than the first current but higher than the second current, a sense amplifier for comparing the output current of the memory cell with the reference current to reproduce binary data, and a reference switching circuit for selectively switching the reference current to be generated by the reference circuit to a normal current, a higher current which is higher than the normal current or a lower current which is lower than the normal current.
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