Integrated circuit memory device and method incorporating flash and ferroelectric random access memory arrays
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United States of America Patent
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Jun 19, 2001
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N/A
app pub date -
Dec 3, 1998
filing date -
Dec 3, 1998
priority date (Note) -
Expired
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Abstract
An integrated circuit memory device and method incorporating Flash and ferroelectric random access memory arrays integrated on a common substrate. The present invention allows a relatively small amount of ferroelectric random access memory to mitigate many of the erase and write time disadvantages exhibited by current Flash technology devices. In particular, whether combined together as a single stand-alone memory device or embedded together as a portion of a processor, microcontroller or application specific integrated circuit ('ASIC'), a block of ferroelectric memory that is sized to match the largest sector of Flash memory can effectively compensate for the latter's slow erasure and write times.
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