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Abstract

A solder bumping method and structure for producing fine-pitch solder bump and which eliminate conventional process compatibility requirements for under bump metallurgy (UBM) and solder bump formation. The method generally entails forming an input/output pad on the surface of a semiconductor device, and then forming a metal layer on the input/output pad that will serve as the UBM of the solder bump. A plating seed layer is then formed on the UBM and on the surrounding surface of the device, after which a mask is formed on the plating seed layer and a via is formed in the mask to expose a portion of the plating seed layer overlying the UBM, and preferably portions of the plating seed layer not overlying the UBM. A solder material is then deposited on the portion of the plating seed layer exposed within the via. Because the via is not limited by the size of the UBM, the deposited solder material is able to cover an area larger than the metal layer, thereby increasing the amount of solder material available to form the solder bump without requiring a thicker mask.

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First Claim