Viable memory cell formed using rapid thermal annealing

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United States of America Patent

PATENT NO 6251717
SERIAL NO

09163315

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Abstract

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A method for forming viable floating gate memory cells in a semiconductor substrate. At various points within the memory cell manufacturing process rapid thermal annealing is used to repair any damage that may be caused to the crystals in the substrate by various processing steps. By quickly repairing any damage to the crystals of the substrate, the rate and amount of overall transient enhanced diffusion of the various dopants within the substrate can be greatly reduced, thereby allowing the production of a viable memory cell. Specifically, the present invention uses rapid thermal annealing during and following the formation of the source and drain regions and the interconnection regions effecting electrical connection between the source regions. This desensitizes the erase rates of the semiconductor device to the etching conditions employed to form the connections.

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Patent Owner(s)

  • MONTEREY RESEARCH, LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ramsbey, Mark Sunnyvale, CA 49 567
Sobek, Daniel Portola Valley, CA 60 977
Trispas, Nicholas H San Jose, CA 1 6

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