Compliant semiconductor chip assemblies and methods of making same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6252301
SERIAL NO

09450252

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor chip package assembly is mounted to contact pads on a die. A compliant interposer layer is disposed between the die and a dielectric substrate wiring layer. The contacts on the die are connected to terminals on the compliant interposer layer by means of a compliant, conductive polymer extending through apertures in the interposer layer. Compliancy in the interposer layer and in the conductive polymer permits relative movement of the terminals on the dielectric substrate wiring layer to the contacts on the die and hence relieves the shear forces caused by differential thermal expansion. The arrangement provides a compact packaged structure similar to that achieved through flip-ship bonding, but with markedly increased resistance to thermal cycling damage. Further, the packaged structure allows the standardization of the packages such that several companies can make competing chips that are packaged such that the resultant packaged structures are roughly the same as far as the end user is concerned.

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Patent Owner(s)

Patent OwnerAddress
TESSERA INC3025 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gilleo, Kenneth B Chepachet, RI 24 887
Grube, Gary W Pleasanton, CA 881 23282
Mathieu, Gaetan Pleasanton, CA 16 995

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