Apparatus and method for operating a dual port memory cell
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United States of America Patent
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Jun 26, 2001
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N/A
app pub date -
Mar 26, 1999
filing date -
Mar 26, 1999
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Abstract
A memory array structure includes a first word line connected to a single port memory cell and a dual port memory cell. The memory array structure also includes a second word line connected to the dual port memory cell. The second word line can control the data storage of the dual port memory during the second phase of a clock signal.
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