Method for manufacturing bit line and bit line contact

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United States of America Patent

PATENT NO 6255168
SERIAL NO

09394637

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method for manufacturing a bit line and a bit line contact. A semiconductor substrate having a word line thereon is provided. Oxide spacers are formed on the sidewalls of the word line. A dielectric layer that covers the word line is formed over the entire substrate. A cap layer is next formed over the dielectric layer. The cap layer and the dielectric layer are patterned to form a trench in the dielectric layer. Silicon nitride spacers are formed on the sidewalls of the trench. In the subsequent step, the dielectric layer is etched down the trench to form a contact window that exposes a portion of the substrate. Polysilicon material is deposited into the contact window to form a polysilicon plug, and then metal silicide material is deposited into the trench above the plug to form a metal silicide layer.

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Patent Owner(s)

  • UNITED MICROELECTRONICS CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gau, Jing-Horng Hsinchu Hsien, TW 36 210

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