Hetero-junction field effect transistor

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United States of America Patent

PATENT NO 6255673
SERIAL NO

09243526

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Abstract

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There is provided a hetero-junction field effect transistor including a multi-layered structure comprising a buffer layer, a channel layer composed of first semiconductor containing n-type impurity therein, a schottky layer composed of a second semiconductor including a forbidden band having a greater width than a width of a forbidden band of the first semiconductor, an electron donating layer composed of a third semiconductor which includes a forbidden band having a greater width than a width of a forbidden band of the first semiconductor, and further contains n-type impurity therein, a contact layer composed of the first semiconductor or a fourth semiconductor including a forbidden band having a smaller width than a width of a forbidden band of the first semiconductor, a gate electrode formed on an exposed surface of the schottky layer in a recess formed through the electron donating layer and the contact layer, and source and drain electrodes located around the gate electrode. The hetero-junction field effect transistor has a higher gate breakdown voltage, and a smaller source and drain resistance.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATION2-24 TOYOSU 3-CHOME KOUTOU-KU TOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kuzuhara, Masaaki Tokyo, JP 31 1105

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