Importance

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Abstract

An on-chip method for self-modifying a programmable logic device (PLD) including a plurality of configurable logic blocks (CLBs), a plurality of interconnect resources for selectively connecting the CLBs, and a block memory circuit selectively connected to the interconnect resources. The CLBs are configured to implement a reconfigurable functional portion and a configuration control portion. A logic function is performed by the reconfigurable functional portion in accordance with first configuration data, while the configuration control portion monitors operation data signals transmitted to or from the reconfigurable functional portion. When the configuration control portion detects a need to modify the configuration of the reconfigurable functional portion, the configuration control portion transmits read instructions (e.g., address information) to the block memory circuit, thereby causing the block memory circuit to transmit modified configuration data to the reconfigurable functional portion, thereby performing self-modification of the PLD using only on-chip resources. In one embodiment, the configuration control portion processes the transmitted operation data received from the reconfigurable functional portion, generates the modified configuration data, and transmits the modified configuration data to the block memory circuit, where the modified configuration data is temporarily stored before transmission to the reconfigurable functional portion.

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First Claim