Data processing unit with digital signal processing capabilities
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United States of America Patent
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Jul 10, 2001
Grant Date -
N/A
app pub date -
Sep 12, 1997
filing date -
Sep 12, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
The present invention relates to a data processing unit comprising a register file, a register load and store buffer connected to the register file, a single memory, and a bus having at least first and second word lines to form a double word wide bus coupling the register load and store buffer with said single memory. The register file at least two sets of registers whereby the first set of registers can be coupled with one of the word lines and the second set of registers can be coupled with the respective other word lines, a load and store control unit for transferring data from or to the memory.
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