Covered slit isolation between integrated circuit devices
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Jul 24, 2001
Grant Date -
N/A
app pub date -
Oct 13, 2000
filing date -
Mar 20, 1998
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A capped slit provides isolation between adjacent devices of an integrated circuit. The cap and slit provide very high immunity to punchthrough and protect the edge of the slit against becoming exposed during subsequent processing that could otherwise remove field oxide. In one embodiment, the capped slit isolates two cells of a flash EEPROM device, and the field oxide lines the slit and serves as the tunneling oxide in the cells. In another embodiment, the slit is filled with a plug of dielectric material.
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