Intermediate-grain reconfigurable processing device
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United States of America Patent
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Jul 24, 2001
Grant Date -
N/A
app pub date -
Apr 15, 1999
filing date -
Apr 11, 1996
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A programmable integrated circuit utilizes a large number of intermediate-grain processing elements which are multibit processing units arranged in a configurable mesh. The coarse-grain resources, such as memory and processing, are deployable in a way that takes advantage of the opportunities for optimization present in given problems. To accomplish this, the interconnect supports three different modes of operation: a static value in which a value set by the configuration data is provided to a functional unit, static source in which another functional unit serves as the value source, and a dynamic source mode in which the source is determined by the value from another functional unit.
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