Memory request reordering in a data processing system

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United States of America Patent

PATENT NO 6272600
SERIAL NO

08808849

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Abstract

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Memory transactions are carried out in an order that maximizes concurrency in a memory system such as a multi-bank interleaved memory system. Read data is collected in a buffer memory to be presented back to the bus in the same order as read transactions were requested. An adaptive algorithm groups writes to minimize overhead associated with transitioning from reading to writing into memory.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTDHSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hypher, Austen J Newton, MA 3 62
Talbot, Gerry R Concord, MA 2 55

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