Testing method for a substrate of active matrix display panel

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United States of America Patent

PATENT NO 6275061
SERIAL NO

09404539

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Abstract

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In the substrate test method of, a first test circuit is connected to an array substrate, and a signal for turning on all the thin film transistors arranged on the array substrate is supplied to a scanning line driving circuit. Also, a predetermined voltage is applied to a signal line driving circuit through signal lines so as to supply a predetermined voltage to a storage capacitor electrode. Under this condition, a high voltage sufficient for forming a potential difference higher than that in the stage of forming a storage capacitor is applied to the storage capacitor line.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA72-34 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI KANAGAWA 2120013 ?2120013

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tomita, Satoru Kawagoe, JP 58 855

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