Method of manufacturing thin film transistor

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6277679
SERIAL NO

09449140

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Abstract

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The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a self-alignment manner. A positive photoresist is applied to a substrate so as to cover the pattern and then is exposed to light applied to the back of the substrate and then is developed, whereby a photoresist 110 is formed. The pattern is etched by using the photoresist pattern as an etching mask to form a gate electrode. A channel forming region, a source region, a drain region, and low-concentration impurity regions, are formed in the semiconductor layer in a self-alignment manner by using the gate electrode as a doping mask.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTD398 HASE ATSUGI-SHI KANAGAWA 2430036 ?2430036

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ohtani, Hisashi Kanagawa, JP 444 21462

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