Forming plugs in vias of circuit board layers and subassemblies
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United States of America Patent
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Sep 4, 2001
Issued Date -
N/A
app pub date -
Sep 2, 1999
filing date -
Sep 2, 1998
priority date (Note) -
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status (Latency Note)
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Abstract
A method of forming a subassembly for use in a printed circuit board is described. This method includes providing a subassembly including a circuit board layer laminated to two sheets of conductive material with two intermediate sheets of prepreg material, forming a via in the assembly, plating the via, filling the via with a plug material in a volatile solvent, evaporating the volatile solvent, and curing the plug material. Also described is a method of forming a partially filled via in a circuit board layer and a method of forming a thermally conductive plug in a circuit board layer for the transfer of thermal energy from one surface of the circuit board to the other.
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