Multi-level type nonvolatile semiconductor memory device

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United States of America Patent

PATENT NO 6285596
SERIAL NO

09679651

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Abstract

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A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode. The electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, the lowermost insulating film among the at least four insulating films is formed as a gate-insulating film, a plurality of different threshold voltages are set to the at least three dielectric films to correspond to their electric charge-capturing states, and at least four kinds of memory states are specified depending upon the plurality of threshold voltages. This constitution makes it possible to easily and reliably adjust the amount of electric charge to be captured and, hence, to store desired multi-value data while preventing the occurrence of an inconvenience such as data corruption.

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Patent Owner(s)

Patent OwnerAddress
FOOTHILLS IP LLC2465 S MADISON ST DENVER CO 80210

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Miura, Hirotomo Tokyo, JP 9 191
Sato, Yasuo Tokyo, JP 144 2132

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