Automated method of circuit analysis
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United States of America Patent
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Sep 11, 2001
Issued Date -
N/A
app pub date -
Jan 28, 1999
filing date -
Jan 28, 1998
priority date (Note) -
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Abstract
A method of analysing integrated circuits is provided. The method provides for scanning the integrated circuit with a beam in order to image an upper layer of the integrated circuit and performing chemical analysis on the upper layer of the integrated circuit. The chemical information and the imaging information are correlated and used to reverse engineer the integrated circuit.
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