Data monitor circuit

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United States of America Patent

PATENT NO 6289470
SERIAL NO

09192593

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Abstract

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Address information that is desired to be monitored of a data storage memory is stored in a data memory address buffer 110, and while a program is being executed the stored address information and address information transferred to a bus are compared. If there is coincidence between the stored address information and the address information transferred to the bus, data that has been transferred to the bus (data that has been read or written based on coincident address information) can be reliably output to the outside. As a result, it is possible to reliably carry out defect analysis for a data storage memory while a program is being executed.

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Patent Owner(s)

Patent OwnerAddress
LAPIS SEMICONDUCTOR CO LTD2-4-8 SHINYOKOHAMA KOUHOKU-KU YOKOHAMA-SHI KANAGAWA 222-8575

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tanaka, Toshiyuki Tokyo, JP 304 4921

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