Semiconductor package that includes a shallow metal basin surrounded by an insulator frame
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United States of America Patent
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-
Sep 18, 2001
Grant Date -
N/A
app pub date -
Dec 31, 1998
filing date -
Apr 2, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor device provided with a shallow metal basin having a flange outwardly extending from the top edge of the side wall of the shallow metal basin, to receive a semiconductor device chip having one or more semiconductor device elements disposed therein and one or more bonding pads arranged thereon, an insulator frame having one or more external terminals arranged thereon, the external terminals being connected with the bonding pads, and the insulator frame being arranged on the flange of the shallow metal basin, and a plastic layer molded to cover the semiconductor device chip, resultantly realizing a semiconductor device packaged in a chip scale package of which the production procedure is simplified and the heat dissipation efficiency and the integration are remarkably improved.
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