Low cost high density thin film processing

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6294477
SERIAL NO

09467121

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Abstract

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A new method is provided for high-density thin film interconnect processing. A thin layer of epoxy is deposited over a substrate surface, a via pattern is created in the epoxy layer, the surface of the epoxy is subjected to a process of swell and etch. A metal plating base is formed on the surface of the dielectric using electroless seeding for the metal deposition. A layer of photoresist is deposited over the plating base and is patterned and etched to create the pattern of the interconnect lines. Semi-additive plating of the interconnect pattern is performed to the plating base. The photoresist is removed. The plating base is removed from between the pattern of the interconnect lines using micro etching thereby creating the interconnect lines. A layer of dielectric is deposited over the surface of the created layer of interconnect lines. A via pattern is created in the dielectric layer. The process may be repeated more than once. Electrical contacts are made to the top metal pads through the top vias.

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Patent Owner(s)

Patent OwnerAddress
THIN FILM MODULE INC8 KUANG FU ROAD NORTH HSIN-CHU R O C

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Deshpaude, Ujwal Anant Fremont, CA 1 7
Ho, Chung W Monte Sereno, CA 43 968
Lin, Chang-Ming Fremont, CA 43 627

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