Self-aligned composite insulator with sub-half-micron multilevel high density electrical interconnections and process thereof
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United States of America Patent
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Sep 25, 2001
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N/A
app pub date -
Aug 2, 1999
filing date -
Oct 8, 1997
priority date (Note) -
Expired
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Abstract
The present invention relates generally to a new sequence of methods and materials to improve the process yield and to enhance the reliability of multilevel interconnection with sub-half-micron geometry by making judicious use of composite insulators to prevent metal thinning over hard metal via plugs and by preventing process induced metal spike formation. The method takes advantage of the double damascene process. The metal spikes and the metal thinning resulting from over etch process is prevented in this method by using a pair of insulators which require different chemistries for etching.
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