Multi-chip stacked package
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United States of America Patent
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Sep 25, 2001
Grant Date -
N/A
app pub date -
Sep 24, 1997
filing date -
Sep 24, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
Two IC chips in a multiple-chip module are stacked together on a common lead frame or substrate of a ball-grid array package to save space. The top chip is wire-bonded to the lead frame. The bottom chip is flip-chip bonded to the lead frame, thus allowing more leads. The common substrate of the two chips are connected together by a conductive layer of metal plate, solder or conductive epoxy. The connecting layer may serve as a heat sinking element or a common electrical terminal.
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