Method and apparatus for memory access scheduling in a video graphics system

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United States of America Patent

PATENT NO 6297832
SERIAL NO

09224692

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Abstract

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A method and apparatus for sequencing memory accesses in a video graphics system such that page faults are effectively hidden is accomplished by receiving a memory access request from one of a plurality of clients, where the plurality of clients includes both linear clients and tiled memory clients. The clients access data stored in a memory that includes at least two banks. Once the memory request has been received, it is evaluated based on other pending requests in order to determine the optimal ordering pattern for execution of the memory requests. The optimal ordering pattern typically includes sequencing alternating accesses between the two banks of the memory such that when a page fault is occurring in one bank of the memory, a memory access is occurring in the opposing bank. Once the ordering of the memory requests has been performed, the requests are executed.

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Patent Owner(s)

Patent OwnerAddress
ATI TECHNOLOGIES ULCONTARIO CANADA ONTARIO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chow, Paul Richmond Hill, CA 23 404
Mizuyabu, Carl K Thornhill, CA 12 192
Swan, Philip L Richmond Hill, CA 43 974
Wang, Chun Toronto, CA 209 1211

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