Antifuse method to repair columns in a prefetched output memory architecture

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United States of America Patent

PATENT NO 6301164
SERIAL NO

09648921

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Abstract

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A memory device having a first set of programmable elements programmed to store an address of a column having a bad memory cell, and a second set of programmable elements programmed to store a segment-in-time (SIT) of the bad memory cell, the SIT of the bad memory cell indicating a relative position of the bad memory cell within a plurality of memory cells being accessed in a memory access. The SIT allows the memory device to selectively repair a bad memory cell within a column of memory cells accessed during a memory operation.

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Patent Owner(s)

Patent OwnerAddress
NANYA TECHNOLOGY CORPHWA-YA TECHNOLOGY PARK 669 FUHSING 3 RD KUEISHAN TAO-YUAN HSIEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Batra, Shubneesh Boise, ID 91 1681
Manning, Troy A Meridian, ID 303 12693
Martin, Chris G Boise, ID 69 1934
Morgan, Donald M Boise, ID 118 2647

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