Apparatus for testing semiconductor memory
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United States of America Patent
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Oct 9, 2001
Grant Date -
N/A
app pub date -
Aug 12, 2000
filing date -
Apr 27, 2000
priority date (Note) -
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Abstract
An apparatus for testing a semiconductor memory is disclosed, which includes a power control module for varying an output voltage of the power supply unit and supplying to the semiconductor memory in accordance with a power control signal from a CPU(Central Processing Unit) of the main board, and an interface unit for supplying the power control signal from the CPU of the main board to the power control module, thus implementing an accurate operation state of an actual mounting environment of a semiconductor memory device by varying and supplying a certain voltage supplied from a power supply unit when testing whether a semiconductor memory device is defective or not using a main board of a computer apparatus.
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