Compiler method and apparatus for elimination of redundant speculative computations from innermost loops

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United States of America Patent

PATENT NO 6301706
SERIAL NO

09220503

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Abstract

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A method and system for use with VLIW processing architectures for avoiding redundant speculative computations in the compilation of the innermost loops. The method includes identifying a plurality of compiled flow paths, where each of the paths includes a plurality of conditions associated with the loop that permits transformation of the loop for more optimum execution. It is then determined whether the loop has an inductive variable and a conditional statement that depends on the inductive variable. It is also determined whether the loop set up values of the inductive variables to subsets, and at least one of which the conditional statement is a loop invariant. Finally, if conditions in the determination steps satisfy the conditions of one of the paths, the loop is transformed into two consecutive loops executable with a reduced set of values of the inductive variable.

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Patent Owner(s)

Patent OwnerAddress
ELBRUS INTERNATIONAL LIMITEDP O BOX 265 GEORGE TOWN GRAND CAYMAN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Maslennikov, Dmitry M Moscow, RU 10 172
Volkonsky, Vladimir Y Moscow, RU 20 428

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