Lifetime-sensitive instruction scheduling mechanism and method
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United States of America Patent
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Oct 16, 2001
Grant Date -
N/A
app pub date -
Jun 18, 1998
filing date -
Jun 18, 1998
priority date (Note) -
Expired
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Abstract
An instruction scheduler in an optimizing compiler schedules instructions in a computer program by determining the lifetimes of fixed registers in the computer program. By determining the lifetimes of fixed registers, the instruction scheduler can achieve a schedule that has a higher degree of parallelism by relaxing dependences between instructions in independent lifetimes of a fixed register so that instructions can be scheduled earlier than would otherwise be possible if those dependences were precisely honored.
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