Digital to analog converter trim apparatus and method
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United States of America Patent
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Oct 23, 2001
Grant Date -
N/A
app pub date -
Sep 30, 1999
filing date -
Sep 30, 1999
priority date (Note) -
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Abstract
A digital to analog converter has a decoder configured to select weighted decoding elements in a decoding network. The decoded outputs increase in steps by a mathematical progression as a function of the value of the input to the decoder. A calibration circuit adjusts the value of the digital input code received by the decoder to achieve a calibration function. In a programmable resistor embodiment, the value of the resistance selected by subsequent digital codes increases by a constant ratio. An adder is used to add an offset value to the digital input, thereby shifting the value of the resistance selected by the decoder to compensate for fabrication variances. A three terminal embodiment suitable for a form-C switch has a shorting switch to permit the programmable resistor to be switched from an extremely high resistance to an extremely low resistance
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